Datasheet

PIC18F2585/2680/4585/4680
DS39625C-page 52 Preliminary © 2007 Microchip Technology Inc.
PIE2 2585 2680 4585 4680 00-0 0000 00-0 0000 uu-u uuuu
2585 2680 4585 4680 0--0 000- 0--0 000- u--u uuu-
IPR1 2585 2680 4585 4680 1111 1111 1111 1111 uuuu uuuu
2585 2680
4585 4680 -111 1111 -111 1111 -uuu uuuu
PIR1 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
(1)
2585 2680 4585 4680 -000 0000 -000 0000 -uuu uuuu
PIE1
2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
2585 2680 4585 4680 -000 0000 -000 0000 -uuu uuuu
OSCTUNE 2585 2680 4585 4680 --00 0000 --00 0000 --uu uuuu
TRISE
2585 2680 4585 4680 0000 -111 0000 -111 uuuu -uuu
TRISD
2585 2680 4585 4680 1111 1111 1111 1111 uuuu uuuu
TRISC 2585 2680 4585 4680 1111 1111 1111 1111 uuuu uuuu
TRISB 2585 2680 4585 4680 1111 1111 1111 1111 uuuu uuuu
TRISA
(5)
2585 2680 4585 4680 1111 1111
(5)
1111 1111
(5)
uuuu uuuu
(5)
LATE 2585 2680 4585 4680 ---- -xxx ---- -uuu ---- -uuu
LATD
2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
LATC 2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
LATB 2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
LATA
(5)
2585 2680 4585 4680 xxxx xxxx
(5)
uuuu uuuu
(5)
uuuu uuuu
(5)
PORTE 2585 2680 4585 4680 ---- x000 ---- x000 ---- uuuu
PORTD 2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
PORTC 2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
PORTB 2585 2680 4585 4680 xxxx xxxx uuuu uuuu uuuu uuuu
PORTA
(5)
2585 2680 4585 4680 xx0x 0000
(5)
uu0u 0000
(5)
uuuu uuuu
(5)
ECANCON 2585 2680 4585 4680 0001 0000 0001 0000 uuuu uuuu
TXERRCNT 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
RXERRCNT 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
COMSTAT 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
CIOCON 2585 2680 4585 4680 --00 ---- --00 ---- --uu ----
BRGCON3 2585 2680 4585 4680 00-- -000 00-- -000 uu-- -uuu
BRGCON2 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
BRGCON1 2585 2680 4585 4680 0000 0000 0000 0000 uuuu uuuu
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
6: This register reads all 0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.