Datasheet

© 2007 Microchip Technology Inc. Preliminary DS39625C-page 323
PIC18F2585/2680/4585/4680
TABLE 23-1: CAN CONTROLLER REGISTER MAP (CONTINUED)
Address
(1)
Name
D7Fh —
(4)
D7Eh —
(4)
D7Dh —
(4)
D7Ch —
(4)
D7Bh RXF11EIDL
D7Ah RXF11EIDH
D79h RXF11SIDL
D78h RXF11SIDH
D77h RXF10EIDL
D76h RXF10EIDH
D75h RXF10SIDL
D74h RXF10SIDH
D73h RXF9EIDL
D72h RXF9EIDH
D71h RXF9SIDL
D70h RXF9SIDH
D6Fh —
(4)
D6Eh —
(4)
D6Dh —
(4)
D6Ch —
(4)
D6Bh RXF8EIDL
D6Ah RXF8EIDH
D69h RXF8SIDL
D68h RXF8SIDH
D67h RXF7EIDL
D66h RXF7EIDH
D65h RXF7SIDL
D64h RXF7SIDH
D63h RXF6EIDL
D62h RXF6EIDH
D61h RXF6SIDL
D60h RXF6SIDH
Note 1: Shaded registers are available in Access Bank low area while the rest are available in Bank 15.
2: CANSTAT register is repeated in these locations to simplify application firmware. Unique names are given
for each instance of the controller register due to the Microchip header file requirement.
3: These registers are not CAN registers.
4: Unimplemented registers are read as ‘0’.