Datasheet
PIC18F2585/2680/4585/4680
DS39625C-page 322 Preliminary © 2007 Microchip Technology Inc.
DFFh —
(4)
DDFh —
(4)
DBFh —
(4)
D9Fh —
(4)
DFEh —
(4)
DDEh —
(4)
DBEh —
(4)
D9Eh —
(4)
DFDh —
(4)
DDDh —
(4)
DBDh —
(4)
D9Dh —
(4)
DFCh TXBIE DDCh —
(4)
DBCh —
(4)
D9Ch —
(4)
DFBh —
(4)
DDBh —
(4)
DBBh —
(4)
D9Bh —
(4)
DFAh BIE0 DDAh —
(4)
DBAh —
(4)
D9Ah —
(4)
DF9h —
(4)
DD9h —
(4)
DB9h —
(4)
D99h —
(4)
DF8h BSEL0 DD8h SDFLC DB8h —
(4)
D98h —
(4)
DF7h —
(4)
DD7h —
(4)
DB7h —
(4)
D97h —
(4)
DF6h —
(4)
DD6h —
(4)
DB6h —
(4)
D96h —
(4)
DF5h —
(4)
DD5h RXFCON1 DB5h —
(4)
D95h —
(4)
DF4h —
(4)
DD4h RXFCON0 DB4h —
(4)
D94h —
(4)
DF3h MSEL3 DD3h —
(4)
DB3h —
(4)
D93h RXF15EIDL
DF2h MSEL2 DD2h —
(4)
DB2h —
(4)
D92h RXF15EIDH
DF1h MSEL1 DD1h —
(4)
DB1h —
(4)
D91h RXF15SIDL
DF0h MSEL0 DD0h —
(4)
DB0h —
(4)
D90h RXF15SIDH
DEFh —
(4)
DCFh —
(4)
DAFh —
(4)
D8Fh —
(4)
DEEh —
(4)
DCEh —
(4)
DAEh —
(4)
D8Eh —
(4)
DEDh —
(4)
DCDh —
(4)
DADh —
(4)
D8Dh —
(4)
DECh —
(4)
DCCh —
(4)
DACh —
(4)
D8Ch —
(4)
DEBh —
(4)
DCBh —
(4)
DABh —
(4)
D8Bh RXF14EIDL
DEAh —
(4)
DCAh —
(4)
DAAh —
(4)
D8Ah RXF14EIDH
DE9h —
(4)
DC9h —
(4)
DA9h —
(4)
D89h RXF14SIDL
DE8h —
(4)
DC8h —
(4)
DA8h —
(4)
D88h RXF14SIDH
DE7h RXFBCON7 DC7h —
(4)
DA7h —
(4)
D87h RXF13EIDL
DE6h RXFBCON6 DC6h —
(4)
DA6h —
(4)
D86h RXF13EIDH
DE5h RXFBCON5 DC5h —
(4)
DA5h —
(4)
D85h RXF13SIDL
DE4h RXFBCON4 DC4h —
(4)
DA4h —
(4)
D84h RXF13SIDH
DE3h RXFBCON3 DC3h —
(4)
DA3h —
(4)
D83h RXF12EIDL
DE2h RXFBCON2 DC2h —
(4)
DA2h —
(4)
D82h RXF12EIDH
DE1h RXFBCON1 DC1h —
(4)
DA1h —
(4)
D81h RXF12SIDL
DE0h RXFBCON0 DC0h —
(4)
DA0h —
(4)
D80h RXF12SIDH
TABLE 23-1: CAN CONTROLLER REGISTER MAP (CONTINUED)
Address
(1)
Name Address Name Address Name Address Name
Note 1: Shaded registers are available in Access Bank low area, while the rest are available in Bank 15.
2: CANSTAT register is repeated in these locations to simplify application firmware. Unique names are given
for each instance of the controller register due to the Microchip header file requirement.
3: These registers are not CAN registers.
4: Unimplemented registers are read as ‘0’.