Datasheet

PIC18F2X1X/4X1X
DS39636D-page 54 © 2009 Microchip Technology Inc.
IPR2 2410 2510 2515 2610 4410 4510 4515 4610 11-- 1111 11-- 1111 uu-- uuuu
PIR2 2410 2510 2515 2610 4410 4510 4515 4610 00-- 0000 00-- 0000 uu-- uuuu
(1)
PIE2 2410 2510 2515 2610 4410 4510 4515 4610 00-- 0000 00-- 0000 uu-- uuuu
IPR1
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111 1111 1111 uuuu uuuu
2410 2510 2515 2610
4410 4510 4515 4610 -111 1111 -111 1111 -uuu uuuu
PIR1
2410 2510 2515 2610 4410 4510 4515 4610 0000 0000 0000 0000 uuuu uuuu
(1)
2410 2510 2515 2610 4410 4510 4515 4610 -000 0000 -000 0000 -uuu uuuu
(1)
PIE1 2410 2510 2515 2610 4410 4510 4515 4610 0000 0000 0000 0000 uuuu uuuu
2410 2510 2515 2610
4410 4510 4515 4610 -000 0000 -000 0000 -uuu uuuu
OSCTUNE 2410 2510 2515 2610 4410 4510 4515 4610 00-0 0000 00-0 0000 uu-u uuuu
TRISE
2410 2510 2515 2610 4410 4510 4515 4610 0000 -111 0000 -111 uuuu -uuu
TRISD
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111 1111 1111 uuuu uuuu
TRISC 2410 2510 2515 2610 4410 4510 4515 4610 1111 1111 1111 1111 uuuu uuuu
TRISB 2410 2510 2515 2610 4410 4510 4515 4610 1111 1111 1111 1111 uuuu uuuu
TRISA
(5)
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111
(5)
1111 1111
(5)
uuuu uuuu
(5)
LATE 2410 2510 2515 2610 4410 4510 4515 4610 ---- -xxx ---- -uuu ---- -uuu
LATD
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
LATC 2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
LATB 2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
LATA
(5)
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx
(5)
uuuu uuuu
(5)
uuuu uuuu
(5)
PORTE 2410 2510 2515 2610 4410 4510 4515 4610 ---- x000 ---- x000 ---- uuuu
PORTD
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
PORTC 2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
PORTB 2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx uuuu uuuu uuuu uuuu
PORTA
(5)
2410 2510 2515 2610 4410 4510 4515 4610 xx0x 0000
(5)
uu0u 0000
(5)
uuuu uuuu
(5)
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out
Reset
MCLR
Resets,
WDT Reset,
RESET
Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.