Datasheet

PIC18F2X1X/4X1X
DS39636D-page 138 © 2009 Microchip Technology Inc.
TABLE 14-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 51
RCON IPEN
SBOREN
(2)
— RI TO PD POR BOR 50
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 54
PIE1 PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 54
IPR1 PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 54
TRISB PORTB Data Direction Control Register 54
TRISC PORTC Data Direction Control Register 54
TMR2 Timer2 Register 52
PR2 Timer2 Period Register 52
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 52
CCPR1L Capture/Compare/PWM Register 1 Low Byte 53
CCPR1H Capture/Compare/PWM Register 1 High Byte 53
CCP1CON
P1M1
(1)
P1M0
(1)
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 53
CCPR2L Capture/Compare/PWM Register 2 Low Byte 53
CCPR2H Capture/Compare/PWM Register 2 High Byte 53
CCP2CON
— — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 53
ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1
(1)
PSSBD0
(1)
53
PWM1CON PRSEN
PDC6
(1)
PDC5
(1)
PDC4
(1)
PDC3
(1)
PDC2
(1)
PDC1
(1)
PDC0
(1)
53
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: These bits are unimplemented on 28-pin devices and read as ‘0’.
2: The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.