Datasheet

PIC18F2X1X/4X1X
DS39636D-page 108 © 2009 Microchip Technology Inc.
TABLE 9-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 54
LATD PORTD Data Latch Register (Read and Write to Data Latch) 54
TRISD PORTD Data Direction Control Register 54
TRISE IBF OBF IBOV PSPMODE
— TRISE2 TRISE1 TRISE0 54
CCP1CON P1M1 P1M0
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 53
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.