Datasheet

2010-2012 Microchip Technology Inc. DS41412F-page 25
PIC18(L)F2X/4XK22
21 40 40 36 RD2/P2B/AN22
RD2 I/O ST Digital I/O
P2B
(1)
O CMOS Enhanced CCP2 PWM output.
AN22 I Analog Analog input 22.
22 41 41 37
RD3/P2C/SS2/AN23
RD3 I/O ST Digital I/O.
P2C O CMOS Enhanced CCP2 PWM output.
SS2
I TTL SPI slave select input (MSSP).
AN23 I Analog Analog input 23.
27 2 2 2
RD4/P2D/SDO2/AN24
RD4 I/O ST Digital I/O.
P2D O CMOS Enhanced CCP2 PWM output.
SDO2 O SPI data out (MSSP).
AN24 I Analog Analog input 24.
28 3 3 3
RD5/P1B/AN25
RD5 I/O ST Digital I/O.
P1B O CMOS Enhanced CCP1 PWM output.
AN25 I Analog Analog input 25.
29 4 4 4
RD6/P1C/TX2/CK2/AN26
RD6 I/O ST Digital I/O.
P1C O CMOS Enhanced CCP1 PWM output.
TX2 O EUSART asynchronous transmit.
CK2 I/O ST EUSART synchronous clock (see related RXx/
DTx).
AN26 I Analog Analog input 26.
30 5 5 5
RD7/P1D/RX2/DT2/AN27
RD7 I/O ST Digital I/O.
P1D O CMOS Enhanced CCP1 PWM output.
RX2 I ST EUSART asynchronous receive.
DT2 I/O ST EUSART synchronous data (see related TXx/
CKx).
AN27 I Analog Analog input 27.
82525 23
RE0/P3A/CCP3/AN5
RE0 I/O ST Digital I/O.
P3A
(2)
O CMOS Enhanced CCP3 PWM output.
CCP3
(2)
I/O ST Capture 3 input/Compare 3 output/PWM 3 output.
AN5 I Analog Analog input 5.
92626 24
RE1/P3B/AN6
RE1 I/O ST Digital I/O.
P3B O CMOS Enhanced CCP3 PWM output.
AN6 I Analog Analog input 6.
TABLE 1-3: PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Pin
Type
Buffer
Type
Description
PDIP TQFP QFN UQFN
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Note 1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
and CCP2MX are set.
2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
CCP3MX and CCP2MX are clear.