Datasheet
PIC18F45J10 FAMILY
DS39682E-page 4 © 2009 Microchip Technology Inc.
Pin Diagrams (Continued)
10
11
2
3
6
1
18
19
20
21
22
12
13
14
15
38
8
7
44
43
42
41
40
39
16
17
29
30
31
32
33
23
24
25
26
27
28
36
34
35
9
PIC18F44J10
37
RA3/AN3/VREF+
RA2/AN2/V
REF-/CVREF-
RA1/AN1
RA0/AN0
MCLR
RB7/KBI3/PGD
RB6/KBI2/PGC
RB5/KBI1/T0CKI/C1OUT
RB4/KBI0/AN11
RC6/TX/CK
RC5/SDO1
RC4/SDI1/SDA1
RD3/PSP3/SS2
RD2/PSP2/SDO2
RD1/PSP1/SDI2/SDA2
RD0/PSP0/SCK2/SCL2
RC3/SCK1/SCL1
RC2/CCP1/P1A
RC1/T1OSI/CCP2*
NC
NC
RC0/T1OSO/T1CKI
OSC2/CLKO
OSC1/CLKI
V
SS
VDD
RE2/CS/AN7
RE1/WR
/AN6
RE0/RD
/AN5
RA5/AN4/SS1
/C2OUT
V
DDCORE/VCAP
RC7/RX/DT
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
V
SS
VDD
RB0/INT0/FLT0/AN12
RB1/INT1/AN10
RB2/INT2/AN8
RB3/AN9/CCP2*
44-Pin TQFP
RD7/PSP7/P1D
5
4
NC
NC
PIC18F45J10
* Pin feature is dependent on device configuration.
= Pins are up to 5.5V tolerant