Datasheet

PIC18F45J10 FAMILY
DS39682E-page 134 © 2009 Microchip Technology Inc.
TABLE 14-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 47
RCON IPEN
CM RI TO PD POR BOR 46
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 49
PIE1 PSPIE
(1)
ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 49
IPR1 PSPIP
(1)
ADIP RCIP TXIP SSP1IP CCP1IP TMR2IP TMR1IP 49
TRISB PORTB Data Direction Control Register 50
TRISC PORTC Data Direction Control Register 50
TMR2 Timer2 Register 48
PR2 Timer2 Period Register 48
T2CON
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 48
CCPR1L Capture/Compare/PWM Register 1 Low Byte 49
CCPR1H Capture/Compare/PWM Register 1 High Byte 49
CCP1CON
P1M1
(1)
P1M0
(1)
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 49
CCPR2L Capture/Compare/PWM Register 2 Low Byte 49
CCPR2H Capture/Compare/PWM Register 2 High Byte 49
CCP2CON
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 49
ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1
(1)
PSSBD0
(1)
49
ECCP1DEL PRSEN
PDC6
(1)
PDC5
(1)
PDC4
(1)
PDC3
(1)
PDC2
(1)
PDC1
(1)
PDC0
(1)
49
Legend: — = unimplemented, read as ‘0. Shaded cells are not used by PWM or Timer2.
Note 1: These bits are not implemented on 28-pin devices and should be read as ‘0’.