Datasheet

© 2009 Microchip Technology Inc. DS39682E-page 109
PIC18F45J10 FAMILY
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 50
LATD
(1)
PORTD Data Latch Register (Read and Write to Data Latch) 50
TRISD
(1)
PORTD Data Direction Control Register 50
TRISE
(1)
IBF OBF IBOV PSPMODE — TRISE2 TRISE1 TRISE0 50
CCP1CON P1M1
(1)
P1M0
(1)
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 49
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1: These registers and/or bits are not available in 28-pin devices.