Datasheet

PIC18F2480/2580/4480/4580
DS39637D-page 84 © 2009 Microchip Technology Inc.
FSR2H — — — — Indirect Data Memory Address Pointer 2 High ---- xxxx 56, 96
FSR2L Indirect Data Memory Address Pointer 2 Low Byte xxxx xxxx 56, 96
STATUS
— — —NOV Z DC C---x xxxx 56, 94
TMR0H Timer0 Register High Byte 0000 0000 56, 153
TMR0L Timer0 Register Low Byte xxxx xxxx 56, 153
T0CON TMR0ON T08BIT T0CS T0SE PSA T0PS2 T0PS1 T0PS0 1111 1111 56, 153
OSCCON IDLEN IRCF2 IRCF1 IRCF0 OSTS IOFS SCS1 SCS0 0000 q000 36, 56
HLVDCON VDIRMAG
— IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0 0-00 0101 56, 273
WDTCON
— — — — — — —SWDTEN--- ---0 56, 359
RCON IPEN SBOREN
(2)
—RITO PD POR BOR 0q-1 11q0 56, 133
TMR1H Timer1 Register High Byte xxxx xxxx 56, 159
TMR1L Timer1 Register Low Byte 0000 0000 56, 159
T1CON RD16 T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
TMR1CS TMR1ON 0000 0000 56, 155
TMR2 Timer2 Register 1111 1111 56, 162
PR2 Timer2 Period Register -000 0000 56, 159
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 56, 161
SSPBUF MSSP Receive Buffer/Transmit Register xxxx xxxx 56, 199
SSPADD MSSP Address Register in I
2
C Slave Mode. MSSP Baud Rate Reload Register in I
2
C Master Mode. 0000 0000 56, 199
SSPSTAT SMP CKE D/A
PSR/WUA BF 0000 0000 56, 201
SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 56, 202
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 56, 203
ADRESH A/D Result Register High Byte xxxx xxxx 56, 262
ADRESL A/D Result Register Low Byte xxxx xxxx 56, 262
ADCON0
— — CHS3 CHS2 CHS1 CHS0 GO/DONE ADON --00 0000 56, 253
ADCON1
— — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 --00 0qqq 56, 254
ADCON2 ADFM
— ACQT2 ACQT1 ACQT0 ADCS2 ADCS1 ADCS0 0-00 0000 57, 255
CCPR1H Capture/Compare/PWM Register 1 High Byte xxxx xxxx 57, 172
CCPR1L Capture/Compare/PWM Register 1 Low Byte xxxx xxxx 57, 172
CCP1CON
— — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 57, 167
ECCPR1H
(9)
Enhanced Capture/Compare/PWM Register 1 High Byte xxxx xxxx 57, 171
ECCPR1L
(9)
Enhanced Capture/Compare/PWM Register 1 Low Byte xxxx xxxx 57, 171
ECCP1CON
(9)
EPWM1M1 EPWM1M0 EDC1B1 EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0 0000 0000 57, 172
BAUDCON ABDOVF RCIDL
— SCKP BRG16 — WUE ABDEN 01-0 0000 57, 234
ECCP1DEL
(9)
PRSEN PDC6
(3)
PDC5
(3)
PDC4
(3)
PDC3
(3)
PDC2
(3)
PDC1
(3)
PDC0
(3)
0000 0000 57, 187
ECCP1AS
(9)
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1
(3)
PSSBD0
(3)
0000 0000 57, 187
CVRCON
(9)
CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 0000 0000 57, 269
CMCON
(9)
C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 0000 0000 57, 263
TMR3H Timer3 Register High Byte xxxx xxxx 57, 165
TMR3L Timer3 Register Low Byte xxxx xxxx 57, 165
T3CON RD16 T3ECCP1
(9)
T3CKPS1 T3CKPS0 T3CCP1
(9)
T3SYNC TMR3CS TMR3ON 0000 0000 57, 165
TABLE 6-2: REGISTER FILE SUMMARY (PIC18F2480/2580/4480/4580) (CONTINUED)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Details on
Page:
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1: Bit 21 of the PC is only available in Test mode and Serial Programming modes.
2: The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 5.4 “Brown-out Reset (BOR)”.
3: These registers and/or bits are not implemented on PIC18F2X80 devices and are read as ‘0’. Reset values are shown for PIC18F4X80 devices;
individual unimplemented bits should be interpreted as ‘—’.
4: The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as ‘0’. See Section 3.6.4 “PLL in INTOSC
Modes”.
5: The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
6: RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
disabled, these bits read as ‘0’.
7: CAN bits have multiple functions depending on the selected mode of the CAN module.
8: This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
9: These registers are available on PIC18F4X80 devices only.