Datasheet

Table Of Contents
© 2009 Microchip Technology Inc. DS39637D-page 187
PIC18F2480/2580/4480/4580
REGISTER 17-2: ECCP1DEL: ECCP PWM DEAD-BAND DELAY REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PRSEN
PDC6
(1)
PDC5
(1)
PDC4
(1)
PDC3
(1)
PDC2
(1)
PDC1
(1)
PDC0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes away;
the PWM restarts automatically
0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM
bit 6-0 PDC<6:0>: PWM Delay Count bits
(1)
Delay time, in number of FOSC/4 (4 * TOSC) cycles, between the scheduled and actual time for a PWM
signal to transition to active.
Note 1: Reserved on PIC18F2X80 devices; maintain these bits clear.
REGISTER 17-3: ECCP1AS: ECCP AUTO-SHUTDOWN CONTROL REGISTER
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1
(1)
PSSBD0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 ECCPASE: ECCP Auto-Shutdown Event Status bit
1 = A shutdown event has occurred; ECCP outputs are in shutdown state
0 = ECCP outputs are operating
bit 6-4 ECCPAS<2:0>: ECCP Auto-Shutdown Source Select bits
111 = RB0 or Comparator 1 or Comparator 2
110 = RB0 or Comparator 2
101 = RB0 or Comparator 1
100 =RB0
011 = Either Comparator 1 or 2
010 = Comparator 2 output
001 = Comparator 1 output
000 = Auto-shutdown is disabled
bit 3-2 PSSAC<1:0>: Pins, A and C, Shutdown State Control bits
1x = Pins, A and C, tri-state (PIC18F4X80 devices)
01 = Drive Pins, A and C, to1
00 = Drive Pins, A and C, to0
bit 1-0 PSSBD<1:0>: Pins, B and D, Shutdown State Control bits
(1)
1x = Pins, B and D, tri-state
01 = Drive Pins, B and D, to1
00 = Drive Pins, B and D, to0
Note 1: Reserved on PIC18F2X80 devices; maintain these bits clear.