Datasheet
PIC18F2455/2550/4455/4550
DS39632E-page 68 © 2009 Microchip Technology Inc.
5.3.5 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM in the data memory space.
SFRs start at the top of data memory and extend down-
ward to occupy the top segment of Bank 15, from F60h
to FFFh. A list of these registers is given in Table 5-1
and Table 5-2.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this
section. Registers related to the operation of a
peripheral feature are described in the chapter for that
peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 5-1: SPECIAL FUNCTION REGISTER MAP
Address Name Address Name Address Name Address Name Address Name
FFFh TOSU FDFh INDF2
(1)
FBFh CCPR1H F9Fh IPR1 F7Fh UEP15
FFEh TOSH FDEh POSTINC2
(1)
FBEh CCPR1L F9Eh PIR1 F7Eh UEP14
FFDh TOSL FDDh POSTDEC2
(1)
FBDh CCP1CON F9Dh PIE1 F7Dh UEP13
FFCh STKPTR FDCh PREINC2
(1)
FBCh CCPR2H F9Ch —
(2)
F7Ch UEP12
FFBh PCLATU FDBh PLUSW2
(1)
FBBh CCPR2L F9Bh OSCTUNE F7Bh UEP11
FFAh PCLATH FDAh FSR2H FBAh
CCP2CON
F9Ah —
(2)
F7Ah UEP10
FF9h PCL FD9h FSR2L FB9h
—
(2)
F99h —
(2)
F79h UEP9
FF8h TBLPTRU FD8h STATUS FB8h BAUDCON F98h
—
(2)
F78h UEP8
FF7h TBLPTRH FD7h TMR0H FB7h ECCP1DEL F97h
—
(2)
F77h UEP7
FF6h TBLPTRL FD6h TMR0L FB6h ECCP1AS F96h TRISE
(3)
F76h UEP6
FF5h TABLAT FD5h T0CON FB5h CVRCON F95h TRISD
(3)
F75h UEP5
FF4h PRODH FD4h
—
(2)
FB4h CMCON F94h TRISC F74h UEP4
FF3h PRODL FD3h OSCCON FB3h TMR3H F93h TRISB F73h UEP3
FF2h INTCON FD2h HLVDCON FB2h TMR3L F92h TRISA F72h UEP2
FF1h INTCON2 FD1h WDTCON FB1h T3CON F91h
—
(2)
F71h UEP1
FF0h INTCON3 FD0h RCON FB0h SPBRGH F90h
—
(2)
F70h UEP0
FEFh INDF0
(1)
FCFh TMR1H FAFh SPBRG F8Fh —
(2)
F6Fh UCFG
FEEh POSTINC0
(1)
FCEh TMR1L FAEh RCREG F8Eh —
(2)
F6Eh UADDR
FEDh POSTDEC0
(1)
FCDh T1CON FADh TXREG F8Dh LATE
(3)
F6Dh UCON
FECh PREINC0
(1)
FCCh TMR2 FACh TXSTA F8Ch LATD
(3)
F6Ch USTAT
FEBh PLUSW0
(1)
FCBh PR2 FABh RCSTA F8Bh LATC F6Bh UEIE
FEAh FSR0H FCAh T2CON FAAh
—
(2)
F8Ah LATB F6Ah UEIR
FE9h FSR0L FC9h SSPBUF FA9h EEADR F89h LATA F69h UIE
FE8h WREG FC8h SSPADD FA8h EEDATA F88h
—
(2)
F68h UIR
FE7h INDF1
(1)
FC7h SSPSTAT FA7h EECON2
(1)
F87h —
(2)
F67h UFRMH
FE6h POSTINC1
(1)
FC6h SSPCON1 FA6h EECON1 F86h —
(2)
F66h UFRML
FE5h POSTDEC1
(1)
FC5h SSPCON2 FA5h —
(2)
F85h —
(2)
F65h SPPCON
(3)
FE4h PREINC1
(1)
FC4h ADRESH FA4h —
(2)
F84h PORTE F64h SPPEPS
(3)
FE3h PLUSW1
(1)
FC3h ADRESL FA3h —
(2)
F83h PORTD
(3)
F63h SPPCFG
(3)
FE2h FSR1H FC2h ADCON0 FA2h IPR2 F82h PORTC F62h SPPDATA
(3)
FE1h FSR1L FC1h ADCON1 FA1h PIR2 F81h PORTB F61h —
(2)
FE0h BSR FC0h ADCON2 FA0h PIE2 F80h PORTA F60h —
(2)
Note 1: Not a physical register.
2: Unimplemented registers are read as ‘0’.
3: These registers are implemented only on 40/44-pin devices.