Datasheet
PIC18F2455/2550/4455/4550
DS39632E-page 392 © 2009 Microchip Technology Inc.
FIGURE 28-10: CAPTURE/COMPARE/PWM TIMINGS (ALL CCP MODULES)
TABLE 28-14: CAPTURE/COMPARE/PWM REQUIREMENTS (ALL CCP MODULES)
Note: Refer to Figure 28-4 for load conditions.
CCPx
(Capture Mode)
50 51
52
CCPx
53
54
(Compare or PWM Mode)
Param
No.
Symbol Characteristic Min Max Units Conditions
50 TccL CCPx Input Low
Time
No prescaler 0.5 T
CY + 20 — ns
With
prescaler
PIC18FXXXX 10 — ns
PIC18LFXXXX 20 — ns VDD = 2.0V
51 TccH CCPx Input
High Time
No prescaler 0.5 T
CY + 20 — ns
With
prescaler
PIC18FXXXX 10 — ns
PIC18LFXXXX 20 — ns VDD = 2.0V
52 TccP CCPx Input Period 3 T
CY + 40
N
—nsN = prescale
value (1, 4 or 16)
53 TccR CCPx Output Fall Time PIC18FXXXX — 25 ns
PIC18LFXXXX — 45 ns V
DD = 2.0V
54 TccF CCPx Output Fall Time PIC18FXXXX — 25 ns
PIC18LFXXXX — 45 ns VDD = 2.0V