Datasheet

PIC18F2455/2550/4455/4550
DS39632E-page 248 © 2009 Microchip Technology Inc.
EXAMPLE 20-1: CALCULATING BAUD RATE ERROR
TABLE 20-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
For a device with FOSC of 16 MHz, desired baud rate of 9600, Asynchronous mode, 8-bit BRG:
Desired Baud Rate = F
OSC/(64 ([SPBRGH:SPBRG] + 1))
Solving for SPBRGH:SPBRG:
X=((FOSC/Desired Baud Rate)/64) – 1
= ((16000000/9600)/64) – 1
= [25.042] = 25
Calculated Baud Rate = 16000000/(64 (25 + 1))
= 9615
Error = (Calculated Baud Rate – Desired Baud Rate)/Desired Baud Rate
= (9615 – 9600)/9600 = 0.16%
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on page
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 55
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 55
BAUDCON
ABDOVF RCIDL RXDTP TXCKP BRG16 — WUE ABDEN 55
SPBRGH EUSART Baud Rate Generator Register High Byte 55
SPBRG EUSART Baud Rate Generator Register Low Byte 55
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.