Datasheet

© 2009 Microchip Technology Inc. DS39632E-page 115
PIC18F2455/2550/4455/4550
TABLE 10-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
PORTA —RA6
(1)
RA5 RA4 RA3 RA2 RA1 RA0 56
LATA
—LATA6
(1)
LATA5 LATA4 LATA3 LATA2 LATA1 LATA0 56
TRISA — TRISA6
(1)
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 56
ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 54
CMCON
C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 55
CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 55
UCON — PPBRST SE0 PKTDIS USBEN RESUME SUSPND —57
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1: RA6 and its associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.