Datasheet

PIC18F2423/2523/4423/4523
DS39755C-page 28 © 2009 Microchip Technology Inc.
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(VDD and VSS), or the voltage level on the RA3/AN3/
V
REF+ and RA2/AN2/VREF-/CVREF pins.
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To oper-
ate in Sleep, the A/D conversion clock must be derived
from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE
bit (ADCON0<1>) is cleared
and A/D Interrupt Flag bit, ADIF, is set.
The block diagram of the A/D module is shown in
Figure 2-1.
FIGURE 2-1: A/D BLOCK DIAGRAM
(Input Voltage)
V
AIN
VREF+
Reference
Voltage
V
DD
(2)
VCFG<1:0>
CHS<3:0>
AN7
(1)
AN6
(1)
AN5
(1)
AN4
AN3
AN2
AN1
AN0
0111
0110
0101
0100
0011
0010
0001
0000
12-Bit
A/D
VREF-
VSS
(2)
Converter
AN12
AN11
AN10
AN9
AN8
1100
1011
1010
1001
1000
Note 1: Channels, AN5 through AN7, are not available on PIC18F2423/2523 devices.
2: I/O pins have diode protection to VDD and VSS.
0X
1X
X
1
X0