Datasheet

PIC18F2420/2520/4420/4520
DS39631E-page 116 © 2008 Microchip Technology Inc.
TABLE 10-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 52
LATD PORTD Data Latch Register (Read and Write to Data Latch) 52
TRISD PORTD Data Direction Register 52
TRISE
(1)
IBF OBF IBOV PSPMODE — TRISE2 TRISE1 TRISE0 52
CCP1CON P1M1
(1)
P1M0
(1)
DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 51
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1: These registers and/or bits are unimplemented on 28-oin devices.