Datasheet

PIC18FXX2
DS39564C-page 88 © 2006 Microchip Technology Inc.
FIGURE 9-2: BLOCK DIAGRAM OF
RA4/T0CKI PIN
FIGURE 9-3: BLOCK DIAGRAM OF
RA6 PIN
Data
Bus
WR TRISA
RD PORTA
Data Latch
TRIS Latch
RD TRISA
Schmitt
Trigger
Input
Buffer
N
V
SS
I/O pin
(1)
TMR0 Clock Input
QD
Q
CK
QD
Q
CK
EN
QD
EN
RD LATA
WR LATA
or
PORTA
Note 1: I/O pin has protection diode to V
SS only.
Data
Bus
Q
D
Q
CK
QD
EN
P
N
WR LATA
WR
Data Latch
TRIS Latch
RD TRISA
RD PORTA
V
SS
VDD
I/O pin
(1)
Note 1: I/O pins have protection diodes to VDD and VSS.
or
PORTA
RD LATA
ECRA6 or
ECRA6 or
Enable
TTL
Input
Buffer
RCRA6
RCRA6 Enable
TRISA
Q
D
Q
CK