Datasheet

PIC18FXX2
DS39564C-page 48 © 2006 Microchip Technology Inc.
IPR2 — — — EEIP BCLIP LVDIP TMR3IP CCP2IP ---1 1111 83
PIR2
— — — EEIF BCLIF LVDIF TMR3IF CCP2IF ---0 0000 79
PIE2
— — — EEIE BCLIE LVDIE TMR3IE CCP2IE ---0 0000 81
IPR1 PSPIP
(3)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 82
PIR1 PSPIF
(3)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 78
PIE1 PSPIE
(3)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 80
TRISE
(3)
IBF OBF IBOV PSPMODE — Data Direction bits for PORTE 0000 -111 98
TRISD
(3)
Data Direction Control Register for PORTD 1111 1111 96
TRISC Data Direction Control Register for PORTC 1111 1111 93
TRISB Data Direction Control Register for PORTB 1111 1111 90
TRISA
—TRISA6
(1)
Data Direction Control Register for PORTA -111 1111 87
LATE
(3)
— — — — — Read PORTE Data Latch,
Write PORTE Data Latch
---- -xxx 99
LATD
(3)
Read PORTD Data Latch, Write PORTD Data Latch xxxx xxxx 95
LATC Read PORTC Data Latch, Write PORTC Data Latch xxxx xxxx 93
LATB Read PORTB Data Latch, Write PORTB Data Latch xxxx xxxx 90
LATA
—LATA6
(1)
Read PORTA Data Latch, Write PORTA Data Latch
(1)
-xxx xxxx 87
PORTE
(3)
Read PORTE pins, Write PORTE Data Latch ---- -000 99
PORTD
(3)
Read PORTD pins, Write PORTD Data Latch xxxx xxxx 95
PORTC Read PORTC pins, Write PORTC Data Latch xxxx xxxx 93
PORTB Read PORTB pins, Write PORTB Data Latch xxxx xxxx 90
PORTA
—RA6
(1)
Read PORTA pins, Write PORTA Data Latch
(1)
-x0x 0000 87
TABLE 4-2: REGISTER FILE SUMMARY (CONTINUED)
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Details
on page:
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1: RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read '0' in all other Oscillator modes.
2: Bit 21 of the TBLPTRU allows access to the device configuration bits.
3: These registers and bits are reserved on the PIC18F2X2 devices; always maintain these clear.