Datasheet

PIC18FXX2
DS39564C-page 318 © 2006 Microchip Technology Inc.
C
CALL ................................................................................ 226
Capture (CCP Module) ..................................................... 119
Associated Registers ...............................................121
CCP Pin Configuration .............................................119
CCPR1H:CCPR1L Registers ................................... 119
Software Interrupt .....................................................119
Timer1/Timer3 Mode Selection ................................ 119
Capture/Compare/PWM (CCP) ........................................ 117
Capture Mode.
See Capture
CCP1 ........................................................................ 118
CCPR1H Register ............................................118
CCPR1L Register ............................................ 118
CCP2 ........................................................................ 118
CCPR2H Register ............................................118
CCPR2L Register ............................................ 118
Compare Mode.
See Compare
Interaction of Two CCP Modules ............................. 118
PWM Mode.
See PWM
Timer Resources ...................................................... 118
Clocking Scheme/Instruction Cycle .................................... 39
CLRF ................................................................................ 227
CLRWDT .......................................................................... 227
Code Examples
16 x 16 Signed Multiply Routine ................................. 72
16 x 16 Unsigned Multiply Routine ............................. 72
8 x 8 Signed Multiply Routine ..................................... 71
8 x 8 Unsigned Multiply Routine ................................. 71
Changing Between Capture Prescalers ...................119
Data EEPROM Read ................................................. 67
Data EEPROM Refresh Routine ................................68
Data EEPROM Write .................................................. 67
Erasing a FLASH Program Memory Row .................. 60
Fast Register Stack .................................................... 39
How to Clear RAM (Bank1) Using
Indirect Addressing ............................................ 50
Initializing PORTA ......................................................87
Initializing PORTB ......................................................90
Initializing PORTC ...................................................... 93
Initializing PORTD ...................................................... 95
Initializing PORTE ......................................................97
Loading the SSPBUF (SSPSR) Register ................. 128
Reading a FLASH Program Memory Word ................ 59
Saving STATUS, WREG and BSR
Registers in RAM ...............................................85
Writing to FLASH Program Memory ..................... 62–63
Code Protection ...............................................................195
COMF ............................................................................... 228
Compare (CCP Module) ...................................................120
Associated Registers ...............................................121
CCP Pin Configuration .............................................120
CCPR1 Register .......................................................120
Software Interrupt .....................................................120
Special Event Trigger
........................109, 115, 120, 188
Timer1/Timer3 Mode Selection ................................ 120
Configuration Bits .............................................................195
Context Saving During Interrupts .......................................85
Conversion Considerations .............................................. 314
CPFSEQ ..........................................................................228
CPFSGT ........................................................................... 229
CPFSLT ........................................................................... 229
D
Data EEPROM Memory
Associated Registers ................................................. 69
EEADR Register ........................................................ 65
EECON1 Register ...................................................... 65
EECON2 Register ...................................................... 65
Operation During Code Protect ................................. 68
Protection Against Spurious Write ............................. 68
Reading ..................................................................... 67
Using .......................................................................... 68
Write Verify ................................................................ 68
Writing ........................................................................ 67
Data Memory ..................................................................... 42
General Purpose Registers ....................................... 42
Map for PIC18F242/442 ............................................ 43
Map for PIC18F252/452 ............................................ 44
Special Function Registers ........................................ 42
DAW ................................................................................ 230
DC and AC Characteristics
Graphs and Tables .................................................. 289
DC Characteristics ....................................................261, 265
DCFSNZ .......................................................................... 231
DECF ............................................................................... 230
DECFSZ .......................................................................... 231
Development Support ...................................................... 253
Device Differences ........................................................... 313
Device Overview .................................................................. 7
Features ....................................................................... 7
Direct Addressing ............................................................... 51
Example ..................................................................... 49
E
Electrical Characteristics .................................................. 259
Errata ................................................................................... 5
F
Firmware Instructions ....................................................... 211
FLASH Program Memory ................................................... 55
Associated Registers ................................................. 63
Control Registers ....................................................... 56
Erase Sequence ........................................................ 60
Erasing ....................................................................... 60
Operation During Code Protect ................................. 63
Reading ..................................................................... 59
TABLAT Register ....................................................... 58
Table Pointer ............................................................. 58
Boundaries Based on Operation ........................ 58
Table Pointer Boundaries .......................................... 58
Table Reads and Table Writes .................................. 55
Block Diagrams
Reads from FLASH Program Memory ....... 59
Writing to .................................................................... 61
Protection Against Spurious Writes ................... 63
Unexpected Termination .................................... 63
Write Verify ........................................................ 63
G
General Call Address Support ......................................... 148
GOTO .............................................................................. 232