Datasheet

© 2006 Microchip Technology Inc. DS39564C-page 27
PIC18FXX2
TABLE 3-1: TIME-OUT IN VARIOUS SITUATIONS
REGISTER 3-1: RCON REGISTER BITS AND POSITIONS
TABLE 3-2: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Oscillator
Configuration
Power-up
(2)
Brown-out
Wake-up from
SLEEP or
Oscillator Switch
PWRTE = 0 PWRTE = 1
HS with PLL enabled
(1)
72 ms + 1024 TOSC
+ 2ms
1024 TOSC
+ 2 ms
72 ms
(2)
+ 1024 TOSC
+ 2 ms
1024 T
OSC + 2 ms
HS, XT, LP 72 ms + 1024 TOSC 1024 TOSC 72 ms
(2)
+ 1024 TOSC 1024 TOSC
EC 72 ms — 72 ms
(2)
—
External RC 72 ms — 72 ms
(2)
—
Note 1: 2 ms is the nominal time required for the 4x PLL to lock.
2: 72 ms is the nominal power-up timer delay, if implemented.
R/W-0 U-0 U-0 R/W-1 R-1 R-1 R/W-0 R/W-0
IPEN — —RITO PD POR BOR
bit 7 bit 0
Note 1: Refer to Section 4.14 (page 53) for bit definitions.
Condition
Program
Counter
RCON
Register
RI
TO PD POR BOR STKFUL STKUNF
Power-on Reset 0000h 0--1 1100 1 1 1 0 0 u u
MCLR Reset during normal
operation
0000h 0--u uuuu u u u u u u u
Software Reset during normal
operation
0000h 0--0 uuuu 0 u u u u u u
Stack Full Reset during normal
operation
0000h 0--u uu11 u u u u u u 1
Stack Underflow Reset during
normal operation
0000h 0--u uu11 u u u u u 1 u
MCLR
Reset during SLEEP 0000h 0--u 10uu u 1 0 u u u u
WDT Reset 0000h 0--u 01uu 1 0 1 u u u u
WDT Wake-up PC + 2 u--u 00uu u 0 0 u u u u
Brown-out Reset 0000h 0--1 11u0 1 1 1 1 0 u u
Interrupt wake-up from SLEEP PC + 2
(1)
u--u 00uu u 1 0 u u u u
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0'
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).