Datasheet

PIC18FXX2
DS39564C-page 282 © 2006 Microchip Technology Inc.
FIGURE 22-16: I
2
C BUS START/STOP BITS TIMING
TABLE 22-15: I
2
C BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
FIGURE 22-17: I
2
C BUS DATA TIMING
Note: Refer to Figure 22-4 for load conditions.
91
92
93
SCL
SDA
START
Condition
STOP
Condition
90
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 TSU:STA START condition 100 kHz mode 4700 — ns Only relevant for Repeated
START condition
Setup time 400 kHz mode 600 —
91 T
HD:STA START condition 100 kHz mode 4000 — ns After this period, the first
clock pulse is generated
Hold time 400 kHz mode 600 —
92 TSU:STO STOP condition 100 kHz mode 4700 — ns
Setup time 400 kHz mode 600 —
93 T
HD:STO STOP condition 100 kHz mode 4000 — ns
Hold time 400 kHz mode 600 —
Note: Refer to Figure 22-4 for load conditions.
90
91 92
100
101
103
106
107
109
109
110
102
SCL
SDA
In
SDA
Out