Datasheet

© 2006 Microchip Technology Inc. DS39564C-page 261
PIC18FXX2
22.1 DC Characteristics: PIC18FXX2 (Industrial, Extended)
PIC18LFXX2 (Industrial)
PIC18LFXX2
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
PIC18FXX2
(Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
-40°C ≤ T
A ≤ +125°C for extended
Param
No.
Symbol Characteristic Min Typ Max Units Conditions
VDD Supply Voltage
D001 PIC18LFXX2 2.0 — 5.5 V HS, XT, RC and LP Osc mode
D001 PIC18FXX2 4.2 — 5.5 V
D002 VDR RAM Data Retention
Voltage
(1)
1.5 — — V
D003 V
POR VDD Start Voltage
to ensure internal
Power-on Reset signal
— — 0.7 V See Section 3.1 (Power-on Reset) for details
D004 SVDD VDD Rise Rate
to ensure internal
Power-on Reset signal
0.05 — — V/ms See Section 3.1 (Power-on Reset) for details
VBOR Brown-out Reset Voltage
D005 PIC18LFXX2
BORV1:BORV0 = 11 1.98 — 2.14 V 85°C ≥ T ≥ 25°C
BORV1:BORV0 = 10 2.67 — 2.89 V
BORV1:BORV0 = 01 4.16 — 4.5 V
BORV1:BORV0 = 00 4.45 — 4.83 V
D005 PIC18FXX2
BORV1:BORV0 = 1x N.A. — N.A. V Not in operating voltage range of device
BORV1:BORV0 = 01 4.16 — 4.5 V
BORV1:BORV0 = 00 4.45 — 4.83 V
Legend: Shading of rows is to assist in readability of the table.
Note 1: This is the limit to which V
DD can be lowered in SLEEP mode, or during a device RESET, without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an
impact on the current consumption.
The test conditions for all I
DD measurements in active Operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V
DD
MCLR
= VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS, and all
features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR,...).
4: For RC osc configuration, current through R
EXT is not included. The current through the resistor can be
estimated by the formula Ir = V
DD/2REXT (mA) with REXT in kOhm.
5: The LVD and BOR modules share a large portion of circuitry. The ΔI
BOR and ΔILVD currents are not additive.
Once one of these modules is enabled, the other may also be enabled without further penalty.