Datasheet

PIC18FXX2
DS39564C-page 206 © 2006 Microchip Technology Inc.
FIGURE 19-2: WAKE-UP FROM SLEEP THROUGH INTERRUPT
(1,2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
OSC1
CLKO
(4)
INT pin
INTF flag
(INTCON<1>)
GIEH bit
(INTCON<7>)
INSTRUCTION FLOW
PC
Instruction
Fetched
Instruction
Executed
PC PC+2 PC+4
Inst(PC) = SLEEP
Inst(PC - 1)
Inst(PC + 2)
SLEEP
Processor in
SLEEP
Interrupt Latency
(3)
Inst(PC + 4)
Inst(PC + 2)
Inst(0008h)
Inst(000Ah)
Inst(0008h)
Dummy Cycle
PC + 4 0008h 000Ah
Dummy Cycle
T
OST
(2)
PC+4
Note 1: XT, HS or LP Oscillator mode assumed.
2: GIE = '1' assumed. In this case, after wake-up, the processor jumps to the interrupt routine. If GIE = '0', execution will continue in-line.
3: T
OST = 1024 TOSC (drawing not to scale). This delay will not occur for RC and EC Osc modes.
4: CLKO is not available in these Osc modes, but shown here for timing reference.