Datasheet

© 2006 Microchip Technology Inc. DS39564C-page 99
PIC18FXX2
TABLE 9-9: PORTE FUNCTIONS
TABLE 9-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name Bit# Buffer Type Function
RE0/RD
/AN5 bit0 ST/TTL
(1)
Input/output port pin or read control input in Parallel Slave Port mode
or analog input:
RD
1 = Not a read operation
0 = Read operation. Reads PORTD register (if chip selected).
RE1/WR/AN6 bit1 ST/TTL
(1)
Input/output port pin or write control input in Parallel Slave Port mode
or analog input:
WR
1 = Not a write operation
0 = Write operation. Writes PORTD register (if chip selected).
RE2/CS
/AN7 bit2 ST/TTL
(1)
Input/output port pin or chip select control input in Parallel Slave Port
mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
All Other
RESETS
PORTE
— — — — —RE2RE1RE0---- -000 ---- -000
LATE
— — — — — LATE Data Output Register ---- -xxx ---- -uuu
TRISE IBF OBF IBOV PSPMODE
— PORTE Data Direction bits 0000 -111 0000 -111
ADCON1
ADFM ADCS2 — — PCFG3 PCFG2 PCFG1 PCFG0 00-- 0000 00-- 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.