Datasheet

 2011 Microchip Technology Inc. DS39932D-page 531
PIC18F46J11 FAMILY
Write, 8-Bit Data, Partially Multiplexed Address ...... 189
Write, 8-Bit Data, Partially Multiplexed Address,
Enable Strobe .................................................. 190
Write, 8-Bit Data, Wait States Enabled, Partially
Multiplexed Address ........................................ 189
Timing Diagrams and Specifications
AC Characteristics
Internal RC Accuracy ....................................... 487
CLKO and I/O Requirements ................................... 488
Enhanced Capture/Compare/PWM Requirements .. 492
EUSARTx Synchronous Receive Requirements ..... 504
EUSARTx Synchronous Transmission
Requirements .................................................. 504
Example SPI Mode Requirements (Master Mode,
CKE = 0) .......................................................... 496
Example SPI Mode Requirements (Master Mode,
CKE = 1) .......................................................... 497
Example SPI Mode Requirements (Slave Mode,
CKE = 0) .......................................................... 498
Example SPI Slave Mode Requirements (CKE = 1) 499
External Clock Requirements .................................. 487
I
2
C Bus Data Requirements (Slave Mode) .............. 501
I
2
C Bus Start/Stop Bits Requirements
(Slave Mode) ................................................... 500
Low-Power Wake-up Time ....................................... 490
MSSPx I
2
C Bus Data Requirements ........................ 503
MSSPx I
2
C Bus Start/Stop Bits Requirements ........ 502
Parallel Master Port Read Requirements ................ 493
Parallel Master Port Write Requirements ................. 494
Parallel Slave Port Requirements ............................ 495
PLL Clock ................................................................. 487
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset
Requirements .................................................. 489
Timer0 and Timer1 External Clock Requirements ... 491
TSTFSZ ........................................................................... 453
Two-Speed Start-up ................................................. 395, 409
Two-Word Instructions
Example Cases .......................................................... 83
TXSTAx Register
BRGH Bit ................................................................. 331
U
Ultra Low-Power Wake-up ................................................. 61
V
Voltage Reference Specifications .................................... 483
Voltage Regulator (On-Chip) ........................................... 407
Operation in Sleep Mode ......................................... 408
W
Watchdog Timer (WDT) ........................................... 395, 405
Associated Registers ............................................... 406
Control Register ....................................................... 405
During Oscillator Failure .......................................... 410
Programming Considerations .................................. 405
WCOL ...................................................... 314, 315, 316, 319
WCOL Status Flag ................................... 314, 315, 316, 319
WWW Address ................................................................. 533
WWW, Online Support ......................................................... 9
X
XORLW ............................................................................ 453
XORWF ............................................................................ 454