Datasheet

 2011 Microchip Technology Inc. DS39932D-page 523
PIC18F46J11 FAMILY
Indirect ....................................................................... 97
Inherent and Literal .................................................... 97
Data Memory ..................................................................... 84
Access Bank .............................................................. 86
Extended Instruction Set ............................................ 99
General Purpose Registers ........................................ 86
Memory Maps
Access Bank Special Function Registers .......... 87
Non-Access Bank Special Function Registers .. 88
PIC18F46J11 Family Devices ........................... 85
Special Function Registers ........................................ 87
Context Defined SFRs ....................................... 89
DAW ................................................................................. 432
DC Characteristics ........................................................... 480
Power-Down and Supply Current ............................ 470
Supply Voltage ......................................................... 469
DCFSNZ .......................................................................... 433
DECF ............................................................................... 432
DECFSZ ........................................................................... 433
Development Support ...................................................... 463
Device Differences ........................................................... 519
Device Overview ................................................................ 11
Details on Individual Family Members ....................... 12
Features (28-Pin Devices) ......................................... 13
Features (44-Pin Devices) ......................................... 13
Other Special Features .............................................. 12
Direct Addressing ............................................................... 98
E
Effect on Standard PIC MCU Instructions ........................ 460
Electrical Characteristics .................................................. 467
Absolute Maximum Ratings ..................................... 467
Enhanced Capture/Compare/PWM (ECCP) .................... 247
Associated Registers ............................................... 269
Capture Mode. See Capture.
Compare Mode. See Compare.
ECCP Mode and Timer Resources .......................... 249
Enhanced PWM Mode ............................................. 255
Auto-Restart ..................................................... 264
Auto-Shutdown ................................................ 263
Direction Change in Full-Bridge Output Mode . 261
Full-Bridge Application ..................................... 259
Full-Bridge Mode ............................................. 259
Half-Bridge Application .................................... 258
Half-Bridge Application Examples ................... 265
Half-Bridge Mode ............................................. 258
Output Relationships (Active-High) .................. 256
Output Relationships Diagram (Active-Low) .... 257
Programmable Dead-Band Delay .................... 265
Shoot-Through Current .................................... 265
Start-up Considerations ................................... 262
Outputs and Configuration ....................................... 249
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART). See EUSART.
Equations
A/D Acquisition Time ................................................ 356
A/D Minimum Charging Time ................................... 356
Bytes Transmitted for a Given DMABC ................... 287
Calculating the Minimum Required Acquisition
Time ................................................................. 356
Errata ................................................................................... 9
EUSART .......................................................................... 327
Asynchronous Mode ................................................ 337
12-Bit Break Transmit and Receive ................. 342
Associated Registers, Reception ..................... 340
Associated Registers, Transmission ................ 338
Auto-Wake-up on Sync Break ......................... 340
Receiver .......................................................... 339
Setting Up 9-Bit Mode with Address Detect .... 339
Transmitter ...................................................... 337
Baud Rate Generator
Operation in Power-Managed Mode ................ 331
Baud Rate Generator (BRG) ................................... 331
Associated Registers ....................................... 332
Auto-Baud Rate Detect .................................... 335
Baud Rates, Asynchronous Modes ................. 333
Formulas .......................................................... 331
High Baud Rate Select (BRGH Bit) ................. 331
Sampling ......................................................... 331
Synchronous Master Mode ...................................... 343
Associated Registers, Reception ..................... 346
Associated Registers, Transmission ............... 344
Reception ........................................................ 345
Transmission ................................................... 343
Synchronous Slave Mode ........................................ 347
Associated Registers, Reception ..................... 349
Associated Registers, Transmission ............... 348
Reception ........................................................ 349
Transmission ................................................... 347
Extended Instruction Set
ADDFSR .................................................................. 456
ADDULNK ............................................................... 456
CALLW .................................................................... 457
MOVSF .................................................................... 457
MOVSS .................................................................... 458
PUSHL ..................................................................... 458
SUBFSR .................................................................. 459
SUBULNK ................................................................ 459
Extended Instructions
Considerations when Enabling ................................ 460
External Clock Input ........................................................... 40
F
Fail-Safe Clock Monitor ........................................... 395, 409
Interrupts in Power-Managed Modes ...................... 411
POR or Wake-up From Sleep .................................. 411
WDT During Oscillator Failure ................................. 410
Fast Register Stack ........................................................... 81
Features Overview ............................................................... 3
Comparative Table ...................................................... 4
Firmware Instructions ...................................................... 413
Flash Program Memory ................................................... 103
Associated Registers ............................................... 112
Control Registers ..................................................... 104
EECON1 and EECON2 ................................... 104
TABLAT (Table Latch) ..................................... 106
TBLPTR (Table Pointer) Register .................... 106
Erase Sequence ...................................................... 108
Erasing .................................................................... 108
Operation During Code-Protect ............................... 112
Reading ................................................................... 107
Table Pointer
Boundaries Based on Operation ..................... 106
Table Pointer Boundaries ........................................ 106
Table Reads and Table Writes ................................ 103
Write Sequence ....................................................... 109
Write Sequence (Word Programming) .................... 111
Writing ..................................................................... 109
Unexpected Termination ................................. 112
Write Verify ...................................................... 112
FSCM. See Fail-Safe Clock Monitor.