Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFN 44 (8x8) 8-Bit 48 MHz I/O number 34

 2011 Microchip Technology Inc. DS39932D-page 5

PIC18F46J11 FAMILY

Pin Diagrams

PIC18F2XJ11

MCLR

RA0/AN0/C1INA/ULPWU/RP0

RA1/AN1/C2INA/RP1

RA2/AN2/V

REF-/CVREF/C2INB

RA3/AN3/V

REF+/C1INB

DDCORE/VCAP

(2)

RA5/AN4/SS1/HLVDIN/RP2

OSC1/CLKI/RA7

OSC2/CLKO/RA6

RC0/T1OSO/T1CKI/RP11

RC1/T1OSI/RP12

RC2/AN11/CTPLS/RP13

RC3/SCK1/SCL1/RP14

RB7/KBI3/PGD/RP10

RB6/KBI2/PGC/RP9

RB5/KBI1/RP8

RB4/KBI0/RP7

RB3/AN9/CTED2/RP6

RB2/AN8/CTED1/REFO/RP5

RB1/AN10/RTCC/RP4

RB0/AN12/INT0/RP3

VSS

RC7/RX1/DT1/RP18

RC6/TX1/CK1/RP17

RC5/SDO1/RP16

RC4/SDI1/SDA1/RP15

28-Pin SPDIP/SOIC/SSOP

(1)

Legend: RPn represents remappable pins.

Note 1: Some input and output functions are routed through the Peripheral Pin Select (PPS) module and can be

dynamically assigned to any of the RPn pins. For a list of the input and output functions, see Table 10-13

and Table 10-14, respectively. For details on configuring the PPS module, see Section 10.7 “Peripheral

Pin Select (PPS)”.

2: See Section 26.3 “On-Chip Voltage Regulator” for details on how to connect the V

DDCORE/VCAP pin.

3: For the QFN package, it is recommended that the bottom pad be connected to V

SS.

28-Pin QFN

(1,3)

1011

12 13 14

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