Datasheet

PIC18F46J11 FAMILY
DS39932D-page 496  2011 Microchip Technology Inc.
FIGURE 29-13: EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
TABLE 29-20: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol Characteristic Min Max Units Conditions
73 T
DIV2SCH,
T
DIV2SCL
Setup Time of SDIx Data Input to SCKx Edge 35
100
—
—
ns
ns
V
DD = 3.3V,
V
DDCORE = 2.5V
V
DD = 2.15V,
V
DDCORE = 2.15V
74 TSCH2DIL,
T
SCL2DIL
Hold Time of SDIx Data Input to SCKx Edge 30
83
—
—
ns
ns
V
DD = 3.3V,
V
DDCORE = 2.5V
V
DD = 2.15V
75 T
DOR SDOx Data Output Rise Time — 25 ns PORTB or PORTC
76 TDOF SDOx Data Output Fall Time — 25 ns PORTB or PORTC
78 T
SCR SCKx Output Rise Time (Master mode) — 25 ns PORTB or PORTC
79 T
SCF SCKx Output Fall Time (Master mode) — 25 ns PORTB or PORTC
SSx
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
73
74
75, 76
78
79
79
78
MSb LSb
bit 6 - - - - - - 1
MSb In
LSb In
bit 6 - - - - 1
Note: Refer to Figure 29-4 for load conditions.