Datasheet

PIC18F46J11 FAMILY

DS39932D-page 44  2011 Microchip Technology Inc.

R/W-0 R/W-1 R/W-1 R/W-0 R-1

(1)

U-1 R/W-0 R/W-0

IDLEN IRCF2 IRCF1 IRCF0 OSTS —SCS1SCS0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 IDLEN: Idle Enable bit

1 = Device enters Idle mode on SLEEP instruction

0 = Device enters Sleep mode on SLEEP instruction

bit 6-4 IRCF<2:0>: Internal Oscillator Frequency Select bits

(4)

111 = 8 MHz (INTOSC drives clock directly)

110 = 4 MHz

(2)

101 = 2 MHz

100 = 1 MHz

011 = 500 kHz

010 = 250 kHz

001 = 125 kHz

000 = 31 kHz (from either INTOSC/256 or INTRC directly)

(3)

bit 3 OSTS: Oscillator Start-up Time-out Status bit

(1)

1 = Oscillator Start-up Timer time-out has expired; primary oscillator is running

0 = Oscillator Start-up Timer time-out is running; primary oscillator is not ready

bit 2 Unimplemented: Read as ‘1’

bit 1-0 SCS<1:0>: System Clock Select bits

11 = Postscaled internal clock (INTRC/INTOSC derived)

10 = Reserved

01 = Timer1 oscillator

00 = Primary clock source (INTOSC postscaler output when FOSC<2:0> = 001 or 000)

00 = Primary clock source (CPU divider output for other values of FOSC<2:0>)

Note 1: Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.

2: Default output frequency of INTOSC on Reset (4 MHz).

3: Source selected by the INTSRC bit (OSCTUNE<7>).

4: When using INTOSC to drive the 4x PLL, select 8 MHz or 4 MHz only to avoid operating the 4x PLL

outside of specification.