Datasheet
2011 Microchip Technology Inc. DS39932D-page 393
PIC18F46J11 FAMILY
TABLE 25-1: REGISTERS ASSOCIATED WITH CTMU MODULE
REGISTER 25-3: CTMUICON: CTMU CURRENT CONTROL REGISTER (ACCESS FB1h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ITRIM5 ITRIM4 ITRIM3 ITRIM2 ITRIM1 ITRIM0 IRNG1 IRNG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 ITRIM<5:0>: Current Source Trim bits
011111 = Maximum positive change from nominal current
011110
.
.
.
000001 = Minimum positive change from nominal current
000000 = Nominal current output specified by IRNG<1:0>
111111 = Minimum negative change from nominal current
.
.
.
100010
100001 = Maximum negative change from nominal current
bit 1-0 IRNG<1:0>: Current Source Range Select bits
11 = 100 Base current
10 = 10 Base current
01 = Base current level (0.55 A nominal)
00 = Current source disabled
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page:
CTMUCONH CTMUEN
— CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN —71
CTMUCONL EDG2POL EDG2SEL1 EDG2SEL0 EDG1POL EDG1SEL1 EDG1SEL0 EDG2STAT EDG1STAT
71
CTMUICON ITRIM5 ITRIM4 ITRIM3 ITRIM2 ITRIM1 ITRIM0 IRNG1 IRNG0
71
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during ECCP operation.