Datasheet

PIC18F46J11 FAMILY
DS39932D-page 354  2011 Microchip Technology Inc.
The analog reference voltage is software select-
able to either the device’s positive and negative
supply voltage (AVDD and AVSS), or the voltage
level on the RA3/AN3/V
REF+/C1INB and
RA2/AN2/V
REF-/CVREF/C2INB pins.
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
Converter, which generates the result via successive
approximation.
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE
bit (ADCON0<1>) is
cleared and the A/D Interrupt Flag bit, ADIF, is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset (POR). These registers will contain
unknown data after a POR.
Figure 21-1 provides the block diagram of the A/D module.
FIGURE 21-1: A/D BLOCK DIAGRAM
(Input Voltage)
V
AIN
VREF+
Reference
Voltage
V
DD
(2)
VCFG<1:0>
CHS<3:0>
AN7
(1)
AN4
AN3
AN2
AN1
AN0
0111
0100
0011
0010
0001
0000
10-Bit
A/D
VREF-
VSS
(2)
Converter
VBG
VDDCORE/VCAP
AN12
AN11
AN10
1111
1110
1100
1011
1010
Note 1: Channels AN5, AN6 and AN7 are not available on 28-pin devices.
2: I/O pins have diode protection to V
DD and VSS.
AN6
(1)
0110
AN5
(1)
0101
AN9
1001
AN8
1000