Datasheet

PIC18F46J11 FAMILY
DS39932D-page 266  2011 Microchip Technology Inc.
18.5.7 PULSE STEERING MODE
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can simultaneously be available on
multiple pins.
Once the Single Output mode is selected
(CCPxM<3:2> = 11 and PxM<1:0> = 00 of the
CCPxCON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits of the
PSTRxCON register, as provided in Table 18-4.
While the PWM Steering mode is active, the
CCPxM<1:0> bits of the CCPxCON register select the
PWM output polarity for the Px<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode as described in Section 18.5.4
“Enhanced PWM Auto-shutdown mode”. An
auto-shutdown event will only affect pins that have
PWM outputs enabled.
REGISTER 18-3: ECCPxDEL: ENHANCED PWM CONTROL REGISTER (ACCESS FBDh/FB7h)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PxRSEN PxDC6 PxDC5 PxDC4 PxDC3 PxDC2 PxDC1 PxDC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
away; the PWM restarts automatically
0 = Upon auto-shutdown, ECCPxASE must be cleared by software to restart the PWM
bit 6-0 PxDC<6:0>: PWM Delay Count bits
PxDCn = Number of F
OSC/4 (4 * TOSC) cycles between the scheduled time when a PWM signal
should transition active and the actual time it transitions active.
Note: The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.