Datasheet

 2011 Microchip Technology Inc. DS39932D-page 205
PIC18F46J11 FAMILY
FIGURE 13-1: TIMER1 BLOCK DIAGRAM
TMR1H TMR1L
T1SYNC
T1CKPS<1:0>
Prescaler
1, 2, 4, 8
0
1
Synchronized
Clock Input
2
Set Flag bit
TMR1IF on
Overflow
TMR1
(2)
TMR1ON
Note 1: ST Buffer is high-speed type when using T1CKI.
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
T1G
T1OSC
F
OSC/4
Internal
Clock
T1OSO/T1CKI
T1OSI
T1OSCEN
1
0
T1CKI
TMR1CS<1:0>
(1)
Synchronize
(3)
det
Sleep Input
TMR1GE
0
1
00
01
10
From Timer0
From Timer2
T1GPOL
D
Q
CK
Q
0
1
T1GVAL
T1GTM
Single Pulse
Acq. Control
T1GSPM
T1GGO/T1DONE
T1GSS<1:0>
EN
OUT
10
00
01
FOSC
Internal
Clock
Match PR2
Overflow
R
D
EN
Q
Q1
RD
T1GCON
Data Bus
det
Interrupt
RTCCIF
Set
T1CLK
FOSC/2
Internal
Clock
D
EN
Q
T1G_IN
TMR1ON