Datasheet

 2011 Microchip Technology Inc. DS39932D-page 133
PIC18F46J11 FAMILY
REGISTER 10-1: ODCON1: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 1 (BANKED F42h)
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
— — — — — —
ECCP2OD ECCP1OD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 Unimplemented: Read as ‘0’
bit 1 ECCP2OD: ECCP2 Open-Drain Output Enable bit
1 = Open-drain capability enabled
0 = Open-drain capability disabled
bit 0 ECCP1OD: ECCP1 Open-Drain Output Enable bit
1 = Open-drain capability enabled
0 = Open-drain capability disabled
REGISTER 10-2: ODCON2: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 2 (BANKED F41h)
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
— — — — — —
U2OD U1OD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 Unimplemented: Read as ‘0’
bit 1 U2OD: USART2 Open-Drain Output Enable bit
1 = Open-drain capability enabled
0 = Open-drain capability disabled
bit 0 U1OD: USART1 Open-Drain Output Enable bit
1 = Open-drain capability enabled
0 = Open-drain capability disabled