Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller PDIP 40 8-Bit 48 MHz I/O number 34

PIC18F2450/4450

INDF2 2450 4450 N/A N/A N/A

POSTINC2 2450 4450 N/A N/A N/A

POSTDEC2 2450 4450 N/A N/A N/A

PREINC2 2450 4450 N/A N/A N/A

PLUSW2 2450 4450 N/A N/A N/A

FSR2H 2450 4450 ---- 0000 ---- 0000 ---- uuuu

FSR2L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

STATUS 2450 4450 ---x xxxx ---u uuuu ---u uuuu

TMR0H 2450 4450 0000 0000 0000 0000 uuuu uuuu

TMR0L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

T0CON 2450 4450 1111 1111 1111 1111 uuuu uuuu

OSCCON 2450 4450 0--- q-00 0--- 0-q0 u--- u-qu

HLVDCON 2450 4450 0-00 0101 0-00 0101 u-uu uuuu

WDTCON 2450 4450 ---- ---0 ---- ---0 ---- ---u

RCON

(4)

2450 4450 0q-1 11q0 0q-q qquu uq-u qquu

TMR1H 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

TMR1L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

T1CON 2450 4450 0000 0000 u0uu uuuu uuuu uuuu

TMR2 2450 4450 0000 0000 0000 0000 uuuu uuuu

PR2 2450 4450 1111 1111 1111 1111 1111 1111

T2CON 2450 4450 -000 0000 -000 0000 -uuu uuuu

ADRESH 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

ADRESL 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

ADCON0 2450 4450 --00 0000 --00 0000 --uu uuuu

ADCON1 2450 4450 --00 qqqq --00 qqqq --uu uuuu

ADCON2 2450 4450 0-00 0000 0-00 0000 u-uu uuuu

CCPR1H 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

CCPR1L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

CCP1CON 2450 4450 --00 0000 --00 0000 --uu uuuu

BAUDCON 2450 4450 01-0 0-00 01-0 0-00 uu-u u-uu

SPBRG 2450 4450 0000 0000 0000 0000 uuuu uuuu

RCREG 2450 4450 0000 0000 0000 0000 uuuu uuuu

TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Power-on Reset,

Brown-out Reset

MCLR

Resets,

WDT Reset,

RESET Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

4: See Table 4-3 for Reset value for specific condition.

5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not

enabled as PORTA pins, they are disabled and read ‘0’.