Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller PDIP 40 8-Bit 48 MHz I/O number 34

PIC18F2450/4450

TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Power-on Reset,

Brown-out Reset

MCLR

Resets,

WDT Reset,

RESET Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

TOSU 2450 4450 ---0 0000 ---0 0000 ---0 uuuu

(1)

TOSH 2450 4450 0000 0000 0000 0000 uuuu uuuu

(1)

TOSL 2450 4450 0000 0000 0000 0000 uuuu uuuu

(1)

STKPTR 2450 4450 00-0 0000 uu-0 0000 uu-u uuuu

(1)

PCLATU 2450 4450 ---0 0000 ---0 0000 ---u uuuu

PCLATH 2450 4450 0000 0000 0000 0000 uuuu uuuu

PCL 2450 4450 0000 0000 0000 0000 PC + 2

(3)

TBLPTRU 2450 4450 --00 0000 --00 0000 --uu uuuu

TBLPTRH 2450 4450 0000 0000 0000 0000 uuuu uuuu

TBLPTRL 2450 4450 0000 0000 0000 0000 uuuu uuuu

TABLAT 2450 4450 0000 0000 0000 0000 uuuu uuuu

PRODH 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

PRODL 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

INTCON 2450 4450 0000 000x 0000 000u uuuu uuuu

(2)

INTCON2 2450 4450 1111 -1-1 1111 -1-1 uuuu -u-u

(2)

INTCON3 2450 4450 11-0 0-00 11-0 0-00 uu-u u-uu

(2)

INDF0 2450 4450 N/A N/A N/A

POSTINC0 2450 4450 N/A N/A N/A

POSTDEC0 2450 4450 N/A N/A N/A

PREINC0 2450 4450 N/A N/A N/A

PLUSW0 2450 4450 N/A N/A N/A

FSR0H 2450 4450 ---- 0000 ---- 0000 ---- uuuu

FSR0L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

WREG 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

INDF1 2450 4450 N/A N/A N/A

POSTINC1 2450 4450 N/A N/A N/A

POSTDEC1 2450 4450 N/A N/A N/A

PREINC1 2450 4450 N/A N/A N/A

PLUSW1 2450 4450 N/A N/A N/A

FSR1H 2450 4450 ---- 0000 ---- 0000 ---- uuuu

FSR1L 2450 4450 xxxx xxxx uuuu uuuu uuuu uuuu

BSR 2450 4450 ---- 0000 ---- 0000 ---- uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

4: See Table 4-3 for Reset value for specific condition.

5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not

enabled as PORTA pins, they are disabled and read ‘0’.