Datasheet

PIC18F2450/4450
© 2008 Microchip Technology Inc. DS39760D-page 29
12 MHz ÷3 (010)
HS, EC, ECIO
None (00)12MHz
÷2 (01)6MHz
÷3 (10)4MHz
÷4 (11)3MHz
HSPLL, ECPLL, ECPIO
÷2 (00)48MHz
÷3 (01)32MHz
÷4 (10) 24 MHz
÷6 (11)16MHz
8MHz ÷2 (001)
HS, EC, ECIO
None (00)8MHz
÷2 (01)4MHz
÷3 (10)2.67MHz
÷4 (11)2MHz
HSPLL, ECPLL, ECPIO
÷2 (00)48MHz
÷3 (01)32MHz
÷4 (10) 24 MHz
÷6 (11)16MHz
4MHz ÷1 (000)
XT, HS, EC, ECIO
None (00)4MHz
÷2 (01)2MHz
÷3 (10)1.33MHz
÷4 (11
)1MHz
HSPLL, ECPLL, XTPLL,
ECPIO
÷2 (00)48MHz
÷3 (01)32MHz
÷4 (10) 24 MHz
÷6 (11)16MHz
TABLE 2-3: OSCILLATOR CONFIGURATION OPTIONS FOR USB OPERATION (CONTINUED)
Input Oscillator
Frequency
PLL Division
(PLLDIV2:PLLDIV0)
Clock Mode
(FOSC3:FOSC0)
MCU Clock Division
(CPUDIV1:CPUDIV0)
Microcontroller
Clock Frequency
Legend: All clock frequencies, except 24 MHz, are exclusively associated with full-speed USB operation (USB clock of 48 MHz).
Bold is used to highlight clock selections that are compatible with low-speed USB operation (system clock of 24 MHz,
USB clock of 6 MHz).
Note 1: Only valid when the USBDIV Configuration bit is cleared.