Datasheet

PIC18F2450/4450
DS39760D-page 102 © 2008 Microchip Technology Inc.
TABLE 9-3: PORTB I/O SUMMARY
Pin Function
TRIS
Setting
I/O I/O Type Description
RB0/AN12/
INT0
RB0 0 OUT DIG LATB<0> data output; not affected by analog input.
1 IN TTL PORTB<0> data input; weak pull-up when RBPU
bit is cleared.
Disabled when analog input enabled.
(1)
AN12 1 IN ANA A/D input channel 12.
(1)
INT0 1 IN ST External interrupt 0 input.
RB1/AN10/
INT1
RB1 0 OUT DIG LATB<1> data output; not affected by analog input.
1 IN TTL PORTB<1> data input; weak pull-up when RBPU
bit is cleared.
Disabled when analog input enabled.
(1)
AN10 1 IN ANA A/D input channel 10.
(1)
INT1 1 IN ST External interrupt 1 input.
RB2/AN8/
INT2/VMO
RB2 0 OUT DIG LATB<2> data output; not affected by analog input.
1 IN TTL PORTB<2> data input; weak pull-up when RBPU
bit is cleared.
Disabled when analog input enabled.
(1)
AN8 1 IN ANA A/D input channel 8.
(1)
INT2 1 IN ST External interrupt 2 input.
VMO 0 OUT DIG External USB transceiver VMO data output.
RB3/AN9/VPO RB3 0 OUT DIG LATB<3> data output; not affected by analog input.
1 IN TTL PORTB<3> data input; weak pull-up when RBPU
bit is cleared.
Disabled when analog input enabled.
(1)
AN9 1 IN ANA A/D input channel 9.
(1)
VPO 0 OUT DIG External USB transceiver VPO data output.
RB4/AN11/
KBI0
RB4 0 OUT DIG LATB<4> data output; not affected by analog input.
1 IN TTL PORTB<4> data input; weak pull-up when RBPU
bit is cleared.
Disabled when analog input enabled.
(1)
AN11 1 IN ANA A/D input channel 11.
(1)
KBI0 1 IN TTL Interrupt-on-pin change.
RB5/KBI1/
PGM
RB5 0 OUT DIG LATB<5> data output.
1 IN TTL PORTB<5> data input; weak pull-up when RBPU
bit is cleared.
KBI1 1 IN TTL Interrupt-on-pin change.
PGM x IN ST Single-Supply Programming mode entry (ICSP™). Enabled by LVP
Configuration bit; all other pin functions disabled.
RB6/KBI2/
PGC
RB6 0 OUT DIG LATB<6> data output.
1 IN TTL PORTB<6> data input; weak pull-up when RBPU
bit is cleared.
KBI2 1 IN TTL Interrupt-on-pin change.
PGC x IN ST Serial execution (ICSP) clock input for ICSP and ICD operation.
(2)
RB7/KBI3/
PGD
RB7 0 OUT DIG LATB<7> data output.
1 IN TTL PORTB<7> data input; weak pull-up when RBPU
bit is cleared.
KBI3 1 IN TTL Interrupt-on-pin change.
PGD x OUT DIG Serial execution data output for ICSP and ICD operation.
(2)
x IN ST Serial execution data input for ICSP and ICD operation.
(2)
Legend: OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Note 1: Configuration on POR is determined by PBADEN Configuration bit. Pins are configured as analog inputs when
PBADEN is set and digital inputs when PBADEN is cleared.
2: All other pin functions are disabled when ICSP™ or ICD operation is enabled.