Datasheet
2010 Microchip Technology Inc. DS39616D-page 69
PIC18F2331/2431/4331/4431
6.5.4 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Ta b l e 6- 1 and Tab l e 6 - 2 .
The SFRs can be classified into two sets: those asso-
ciated with the “core” function and those related to the
peripheral functions. Those registers related to the
“core” are described in this section, while those related
to the operation of the peripheral features are
described in the section of that peripheral feature.
The SFRs are typically distributed among the
peripherals whose functions they control.
The unused SFR locations will be unimplemented and
read as ‘0’s.
TABLE 6-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18F2331/2431/4331/4431 DEVICES
Address Name Address Name Address Name Address Name Address Name
FFFh TOSU FDFh INDF2
(1)
FBFh CCPR1H F9Fh IPR1 F7Fh PTCON0
FFEh TOSH FDEh POSTINC2
(1)
FBEh CCPR1L F9Eh PIR1 F7Eh PTCON1
FFDh TOSL FDDh POSTDEC2
(1)
FBDh CCP1CON F9Dh PIE1 F7Dh PTMRL
FFCh STKPTR FDCh PREINC2
(1)
FBCh CCPR2H F9Ch —
(2)
F7Ch PTMRH
FFBh PCLATU FDBh PLUSW2
(1)
FBBh CCPR2L F9Bh OSCTUNE F7Bh PTPERL
FFAh PCLATH FDAh FSR2H FBAh CCP2CON F9Ah ADCON3 F7Ah PTPERH
FF9h PCL FD9h FSR2L FB9h ANSEL1 F99h ADCHS F79h PDC0L
FF8h TBLPTRU FD8h STATUS FB8h ANSEL0 F98h
—
(2)
F78h PDC0H
FF7h TBLPTRH FD7h TMR0H FB7h T5CON F97h
—
(2)
F77h PDC1L
FF6h TBLPTRL FD6h TMR0L FB6h QEICON F96h TRISE
(3)
F76h PDC1H
FF5h TABLAT FD5h T0CON FB5h
—
(2)
F95h TRISD
(3)
F75h PDC2L
FF4h PRODH FD4h
—
(2)
FB4h —
(2)
F94h TRISC F74h PDC2H
FF3h PRODL FD3h OSCCON FB3h
—
(2)
F93h TRISB F73h PDC3L
(3)
FF2h INTCON FD2h LVDCON FB2h —
(2)
F92h TRISA F72h PDC3H
(3)
FF1h INTCON2 FD1h WDTCON FB1h —
(2)
F91h PR5H F71h SEVTCMPL
FF0h INTCON3 FD0h RCON FB0h SPBRGH F90h PR5L F70h SEVTCMPH
FEFh INDF0
(1)
FCFh TMR1H FAFh SPBRG F8Fh —
(2)
F6Fh PWMCON0
FEEh POSTINC0
(1)
FCEh TMR1L FAEh RCREG F8Eh —
(2)
F6Eh PWMCON1
FEDh POSTDEC0
(1)
FCDh T1CON FADh TXREG F8Dh LATE
(3)
F6Dh DTCON
FECh PREINC0
(1)
FCCh TMR2 FACh TXSTA F8Ch LATD
(3)
F6Ch FLTCONFIG
FEBh PLUSW0
(1)
FCBh PR2 FABh RCSTA F8Bh LATC F6Bh OVDCOND
FEAh FSR0H FCAh T2CON FAAh BAUDCON F8Ah LATB F6Ah OVDCONS
FE9h FSR0L FC9h SSPBUF FA9h EEADR F89h LATA F69h CAP1BUFH
FE8h WREG FC8h SSPADD FA8h EEDATA F88h TMR5H F68h CAP1BUFL
FE7h INDF1
(1)
FC7h SSPSTAT FA7h EECON2 F87h TMR5L F67h CAP2BUFH
FE6h POSTINC1
(1)
FC6h SSPCON FA6h EECON1 F86h —
(2)
F66h CAP2BUFL
FE5h POSTDEC1
(1)
FC5h —
(2)
FA5h IPR3 F85h —
(2)
F65h CAP3BUFH
FE4h PREINC1
(1)
FC4h ADRESH FA4h PIR3 F84h PORTE F64h CAP3BUFL
FE3h PLUSW1
(1)
FC3h ADRESL FA3h PIE3 F83h PORTD
(3)
F63h CAP1CON
FE2h FSR1H FC2h ADCON0 FA2h IPR2 F82h PORTC F62h CAP2CON
FE1h FSR1L FC1h ADCON1 FA1h PIR2 F81h PORTB F61h CAP3CON
FE0h BSR FC0h ADCON2 FA0h PIE2 F80h PORTA F60h DFLTCON
Note 1: This is not a physical register.
2: Unimplemented registers are read as ‘0’.
3: This register is not available on 28-pin devices.