Datasheet

 2010 Microchip Technology Inc. DS39616D-page 51

PIC18F2331/2431/4331/4431

5.6 Reset State of Registers

Most registers are unaffected by a Reset. Their status

is unknown on POR and unchanged by all other

Resets. The other registers are forced to a “Reset

state” depending on the type of Reset that occurred.

Most registers are not affected by a WDT wake-up,

since this is viewed as the resumption of normal

operation.

Status bits from the RCON register (RI

, TO, PD, POR

and BOR) are set or cleared differently in different

Reset situations, as indicated in Ta bl e 5 - 2 . These bits

are used in software to determine the nature of the

Reset.

Table 5-3 describes the Reset states for all of the

Special Function Registers. These are categorized by

Power-on and Brown-out Resets, Master Clear and

WDT Resets, and WDT wake-ups.

FIGURE 5-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD, VDD RISE < TPWRT)

FIGURE 5-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR

NOT TIED TO VDD): CASE 1

TPWRT

TOST

VDD

MCLR

INTERNAL POR

PWRT TIME-OUT

OST TIME-OUT

INTERNAL RESET