Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 360  2010 Microchip Technology Inc.
FIGURE 26-17: EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 26-18: EUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 26-18: EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 26-19: EUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param
No.
Symbol Characteristic Min Max Units Conditions
120 TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock High to Data Out Valid PIC18FXX31 — 40 ns
PIC18LFXX31 — 100 ns
121 Tckrf Clock Out Rise Time and Fall Time
(Master mode)
PIC18FXX31 — 20 ns
PIC18LFXX31 — 50 ns
122 Tdtrf Data Out Rise Time and Fall Time PIC18FXX31 — 20 ns
PIC18LFXX31 — 50 ns
Param.
No.
Symbol Characteristic Min Max Units Conditions
125 TdtV2ckl SYNC RCV (MASTER & SLAVE)
Data Hold before CK  (DT hold time) 10 — ns
126 TckL2dtl Data Hold after CK  (DT hold time) 15 — ns
121
121
120
122
RC6/TX/CK/SS
RC7/RX/DT/SDO
Pin
Pin
125
126
RC6/TX/CK/SS
RC7/RX/DT/SDO
Pin
Pin