Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 350  2010 Microchip Technology Inc.
TABLE 26-8: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol Characteristic Min Typ Max Units Conditions
30 T
MCL MCLR Pulse Width (low) 2 — — s
31 TWDT Watchdog Timer Time-out Period
(no postscaler)
—4.00
—
ms
32 T
OST Oscillation Start-up Timer Period 1024 TOSC — 1024 TOSC —TOSC = OSC1 period
33 TPWRT Power-up Timer Period — 65.5
—
ms
34 T
IOZ I/O High-impedance from MCLR
Low or Watchdog Timer Reset
—2—s
35 T
BOR Brown-out Reset Pulse Width 200 — — sVDD  BVDD (see D005)
36 T
IRVST Time for Internal Reference
Voltage to become Stable
—2050 s
37 T
LVD Low-Voltage Detect Pulse Width 200 — — sVDD  VLVD
38 TCSD CPU Start-up Time — 10 — s
39 TIOBST Time for INTOSC to Stabilize — 1 — ms