Datasheet
2010 Microchip Technology Inc. DS39616D-page 275
PIC18F2331/2431/4331/4431
TABLE 23-2: SUMMARY OF WATCHDOG TIMER REGISTERS
REGISTER 23-15: WDTCON: WATCHDOG TIMER CONTROL REGISTER
R-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
WDTW
— — — — — —SWDTEN
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 WDTW: Watchdog Timer Window bit
1 = WDT count is in fourth quadrant
0 = WDT count is not in fourth quadrant
bit 6-1 Unimplemented: Read as ‘0’
bit 0 SWDTEN: Software Enable/Disable for Watchdog Timer bit
(1)
1 = WDT is turned on
0 = WDT is turned off
Note 1: If the WDTEN Configuration bit = 1, then WDT is always enabled, irrespective of this control bit. If WDTEN
Configuration bit = 0, then it is possible to turn WDT on/off with this control bit.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
CONFIG2H — —WINENWDTPS3 WDTPS2 WDTPS2 WDTPS0 WDTEN
RCON
IPEN — — RI TO PD POR BOR
WDTCON WDTW — — — — — —SWDTEN
Legend: Shaded cells are not used by the Watchdog Timer.