Datasheet
2010 Microchip Technology Inc. DS39616D-page 267
PIC18F2331/2431/4331/4431
REGISTER 23-4: CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
U-0 U R/P-1 R/P-1 R/P-1 R/P-1 U U
— —T1OSCMXHPOL
(1)
LPOL
(1)
PWMPIN
(3)
— —
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed U = Unchanged from programmed state
bit 7-6 Unimplemented: Read as ‘0’
bit 5 T1OSCMX: Timer1 Oscillator Mode bit
1 = Low-power Timer1 operation when microcontroller is in Sleep mode
0 = Standard (legacy) Timer1 oscillator operation
bit 4 HPOL: High Side Transistors Polarity bit (i.e., Odd PWM Output Polarity Control bit)
(1)
1 = PWM1, 3, 5 and 7 are active-high (default)
(2)
0 = PWM1, 3, 5 and 7 are active-low
(2)
bit 3 LPOL: Low Side Transistors Polarity bit (i.e., Even PWM Output Polarity Control bit)
(1)
1 = PWM0, 2, 4 and 6 are active-high (default)
(2)
0 = PWM0, 2, 4 and 6 are active-low
(2)
bit 2 PWMPIN: PWM Output Pins Reset State Control bit
(3)
1 = PWM outputs are disabled upon Reset (default)
0 = PWM outputs drive active states upon Reset
bit 1-0 Unimplemented: Read as ‘0’
Note 1: Polarity control bits, HPOL and LPOL, define PWM signal output active and inactive states; PWM states
generated by the Fault inputs or PWM manual override.
2: PWM6 and PWM7 output channels are only available on PIC18F4331/4431 devices.
3: When PWMPIN = 0, PWMEN<2:0> = 101 if the device has eight PWM output pins (40 and 44-pin
devices) and PWMEN<2:0> = 100 if the device has six PWM output pins (28-pin devices). PWM output
polarity is defined by HPOL and LPOL.