Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 250  2010 Microchip Technology Inc.
EXAMPLE 21-1: CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
FIGURE 21-2: ANALOG INPUT MODEL
TACQ =TAMP + TC + TCOFF
TAMP = Negligible
T
COFF = (Temp – 25°C)(0.005 s/°C)
(50°C – 25°C)(0.005 s/°C) = .13 s
Temperature coefficient is only required for temperatures > 25°C. Below 25°C, T
COFF = 0 s.
T
C =-(CHOLD) (RIC + RSS + RS) ln(1/2047) s
-(9 pF) (1 k + 6 k + 100) ln(0.0004883) s = .49 s
TACQ =0 + .49 s + .13 s = .62 s
Note: If the converter module has been in Sleep mode, T
AMP is 2.0 s from the time the part exits Sleep mode.
VAIN
CPIN
Rs
ANx
5 pF
V
DD
VT = 0.6V
V
T = 0.6V
I
LEAKAGE
RIC 1k
Sampling
Switch
SS
R
SS
CHOLD = 9 pF
V
SS
6V
Sampling Switch
5V
4V
3V
2V
567891011
(k)
VDD
±100 nA
Legend: CPIN
VT
ILEAKAGE
RIC
SS
C
HOLD
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
various junctions
= Sampling Switch Resistance RSS
Note: For VDD < 2.7V and temperatures below 0°C, VAIN should be restricted to range: VAIN < VDD/2.