Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 236  2010 Microchip Technology Inc.
TABLE 20-8: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on Page:
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 54
PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 57
PIE1
— ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 57
IPR1 — ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 57
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 56
RCREG EUSART Receive Register 56
TXSTA CSRC
TX9 TXEN SYNC SENDB BRGH TRMT TX9D 56
BAUDCON — RCIDL — SCKP BRG16 — WUE ABDEN 56
SPBRGH EUSART Baud Rate Generator Register High Byte 56
SPBRG EUSART Baud Rate Generator Register Low Byte 56
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master reception.