Datasheet

PIC18F2331/2431/4331/4431
DS39616D-page 214  2010 Microchip Technology Inc.
19.3.1.2 Reception
When the R/W bit of the address byte is clear and an
address match occurs, the R/W
bit of the SSPSTAT
register is cleared. The received address is loaded into
the SSPBUF register.
When the address byte overflow condition exists, then
the no Acknowledge (ACK
) pulse is given. An overflow
condition is defined as either bit BF (SSPSTAT<0>) is
set, or bit SSPOV (SSPCON<6>) is set. This is an error
condition due to the user’s firmware.
An SSP interrupt is generated for each data transfer
byte. Flag bit, SSPIF (PIR1<3>), must be cleared in
software. The SSPSTAT register is used to determine
the status of the byte.
FIGURE 19-6: I
2
C™ WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
P
9
8
7
6
5
D0D1
D2D3D4D5D6D7
S
A7 A6 A5 A4 A3 A2 A1SDA
SCL
12
3
4
5
6
7
8
9
12
3
4
56
7
89
123
4
Bus master
terminates
transfer
SSPOV bit is set because the SSPBUF register is still full
Cleared in software
SSPBUF register is read
ACK
Receiving Data
Receiving Data
D0D1D2D3D4D5D6D7
ACK
R/W = 0
Receiving Address
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
ACK
ACK is not sent