Datasheet

 2010 Microchip Technology Inc. DS39616D-page 171
PIC18F2331/2431/4331/4431
TABLE 17-8: REGISTERS ASSOCIATED WITH THE MOTION FEEDBACK MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset Values
on Page:
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 54
IPR3 — — — PTIP IC3DRIP IC2QEIP IC1IP TMR5IP 56
PIE3
— — — PTIE IC3DRIE IC2QEIE IC1IE TMR5IE 56
PIR3 — — — PTIF IC3DRIF IC2QEIF IC1IF TMR5IF 56
TMR5H Timer5 Register High Byte 57
TMR5L Timer5 Register Low Byte 57
PR5H Timer5 Period Register High Byte 57
PR5L Timer5 Period Register Low Byte 57
T5CON T5SEN RESEN
T5MOD T5PS1 T5PS0 T5SYNC TMR5CS TMR5ON 57
CAP1BUFH/
VELRH
Capture 1 Register High Byte/Velocity Register High Byte
(1)
58
CAP1BUFL/
VELRL
Capture 1 Register Low Byte/Velocity Register Low Byte
(1)
58
CAP2BUFH/
POSCNTH
Capture 2 Register High Byte/QEI Position Counter Register High Byte
(1)
58
CAP2BUFL/
POSCNTL
Capture 2 Register Low Byte/QEI Position Counter Register Low Byte
(1)
58
CAP3BUFH/
MAXCNTH
Capture 3 Register High Byte/QEI Max. Count Limit Register High Byte
(1)
58
CAP3BUFL/
MAXCNTL
Capture 3 Register Low Byte/QEI Max. Count Limit Register Low Byte
(1)
58
CAP1CON
—CAP1REN— — CAP1M3 CAP1M2 CAP1M1 CAP1M0 59
CAP2CON —CAP2REN— — CAP2M3 CAP2M2 CAP2M1 CAP2M0 59
CAP3CON —CAP3REN— — CAP3M3 CAP3M2 CAP3M1 CAP3M0 59
DFLTCON
— FLT4EN FLT3EN FLT2EN FLT1EN FLTCK2 FLTCK1 FLTCK0 59
QEICON VELM
QERR UP/DOWN QEIM2 QEIM1 QEIM0 PDEC1 PDEC0 56
Legend: — = unimplemented. Shaded cells are not used by the Motion Feedback Module.
Note 1: Register name and function determined by which submodule is selected (IC/QEI, respectively). See
Section 17.1.10 “Other Operating Modes” for more information.